Prior art computer systems are generally provided with one of two types of displays; Cathode-Ray Tube (CRT) or Flat Panel Display (FPD). CRT displays generally require an analog input comprising analog signals indicating the intensity of Red, Blue, and Green (RGB) components as well as horizontal and vertical synchronization signals.
FPDs generally operate using one of two technologies. So-called passive matrix (e.g., Dual-Scan Super-Twist Neumatic, or DSTN) displays comprise a grid of horizontally and vertically oriented conductors on opposite sides of a liquid crystal matrix. When current is applied to corresponding conductors, a corresponding liquid crystal portion is activated, generating a display pixel.
So-called active-matrix displays comprise a plurality of transistors formed in a grid, one for each color of a given pixel int he display. When each transistor is activated, a liquid crystal portion corresponding to a color of a pixel is activated. In both active- and passive-matrix FPDs, generally digital signals are used to activate each pixel within the display. Variations in shading and color are generally achieved through the use of timing or dithering techniques and the like.
In the prior art, separate video controller devices may be used to generate signals for FPDs or CRTs. Video controllers dedicated to CRT use are generally applied to the desktop personal computer (PC) market which generally uses the higher resolution and less expensive CRT as a display device. Dedicated FPD display controllers are generally designed for the portable or laptop computer market for generating digital signals for compact, energy-saving flat panel displays.
For many portable or lap-top computers, an analog output is desirable for connecting a portable or laptop computer to an analog CRT display, in docking use or for display presentations or the like. An FPD display controller may be suitably modified by adding an digital to analog converter (DAC) to provide an analog output for a CRT display device.
FIG. 1 is a block diagram illustrating a prior art VGA controller for use with a laptop computer or other portable computer display device. VGA controller 100 may be coupled to a host processor (not shown) through system bus 190. For the purposes of this application, the term "VGA" (video graphics array or adapter) shall be construed to include VGA, SVGA, and other expanded or modified VGA controllers or other devices. It should also be appreciated that the present invention is not limited to the use of VGA controllers, but may be applied to other types of systems (e.g., MacIntosh.RTM. PCs, television displays, and the like).
System bus 190 may comprise any one of a number of known system buses, such as the Industry Standards Association (ISA) bus, Peripheral Component Interconnect (PCI), or Advanced Graphics Port (AGP), or the like. VGA core circuitry 120 receives display data from host processor (not shown) and stores such display data in display 170. VGA core circuitry 120 comprises conventional VGA core circuitry as is known in the art. VGA core circuitry may further comprise additional circuitry such as 2-D and 3-D graphics engines, MotionVideo.TM. processing circuitry, and the like.
Flat panel display controller 140 retrieves display data from display memory 170 and generates digital signals to flat panel display 160. Such digital signals include digital data for each pixel within flat panel display 160 indicating whether that pixel is to be turned on or off at a given point in time. Digital signals from flat panel display controller 140 to flat panel display 160 also include flat panel clocking and control signals.
If provided with an analog output, video controller 100 may also be equipped with RAMDAC 130. RAMDAC 130 comprises a color look-up table or CLUT (the RAM portion of RAMDAC 130) for color converting data from display memory 170. Flat panel display controller 140 may be equipped with a similar look-up table or may operate form the same look-up table within RAMDAC 130. RAMDAC 130 also includes a Digital-to-Analog Converter (DAC) for generating analog output signals from data the CLUT within RAMDAC 130 or directly from data within display memory 170.
Analog output signals R, G, and B indicate the intensity of respective red, green, and blue sub-pixels for each pixel on CRT display 150 and are timed correspondingly for each pixel in a horizontal scan line. Timing information is also sent from VGA core logic 120 to CRT 150 in the form of horizontal sync information HSYNC, vertical sync information VSYNC, and pixel or dot clock information D.sub.-- CLK. CRT 150 utilizes analog signals R, G, and B, as well as timing signals HSYNC, VSYNC, and D.sub.-- CLK to generate a display image using prior art electron gun technology.
The block diagram of FIG. 1 also illustrates the basic components of a prior art VGA controller for desktop use. However, a desktop VGA controller may not generally be provided with flat panel display controller 140, and digital output for flat panel display 160.
Thus, FPD controller 100 of FIG. 1 remains specific to the FPD market. In order to reduce costs for desktop units, such digital FPD controller circuitry may generally not be provided in a CRT-only controller. With the rising cost of computers, and computers becoming more commodity-like items, it becomes imperative that a display controller manufacturer realize economies of scale by providing a single design for as many markets as possible.
In addition, the analog CRT may, in coming years, become obsolete. There are already on the market flat panel displays for desktop use, intended to replace the conventional CRT display. However, such flat panel displays generally require the use of a specialized flat panel display controller card. Thus, a user wishing to upgrade a desktop PC to flat panel display technology may need to discard not only the CRT, but also the flat panel display controller as well.
In addition, new forms of digital CRTs may soon reach the market. For example, the long-awaited HDTV standard is being adopted, and a new generation of digital televisions will reach the market. Such digital televisions may be suitable for use with computer systems for generating displays. However, such digital televisions may require dedicated display interfaces in order to generate a display from a computer system.
In co-pending U.S. application Ser. No. 08/704,842, filed Aug. 28, 1996, entitled "METHOD AND APPARATUS FOR PROVIDING LCD PANEL PROTECTION IN AN LCD DISPLAY CONTROLLER", incorporated herein by reference, a display controller for a flat panel display is described with a circuit for protecting a flat panel display from damage. A flat panel display may be provided with a high-voltage power V.sub.EE and flat panel logic power V.sub.DD. If V.sub.EE is applied to an FPD without V.sub.DD, the flat panel display may be damaged.
Under normal circumstances, such an application of voltages may not ordinarily occur. However, during testing phases, or during flat panel power-up and power-down, if a hardware or software error occurs, it is possible that such voltages could be improperly applied, and a flat panel display damaged. A control circuit which monitors flat panel display signals and properly shuts down power to a flat panel display may prevent such damage. It may be desirable to provide such a flat panel display protection circuit as a stand-alone device to incorporate into a flat panel display or as an add-on device for a flat panel display controller or the like.